misleading_pre_increment
建立於 差異永不過期
F1(std::unordered_set<int, std::hash<int>, std::equal_to<int>, std::allocator<int> > const&):
G1(std::unordered_set<int, std::hash<int>, std::equal_to<int>, std::allocator<int> > const&):
mov rax, QWORD PTR [rdi+16]
mov rax, QWORD PTR [rdi+16]
xor edx, edx
xor edx, edx
test rax, rax
test rax, rax
je .L1
je .L1
.L3:
.L3:
add edx, DWORD PTR [rax+8]
add edx, DWORD PTR [rax+8]
mov rax, QWORD PTR [rax]
mov rax, QWORD PTR [rax]
test rax, rax
test rax, rax
jne .L3
jne .L3
.L1:
.L1:
mov eax, edx
mov eax, edx
ret
ret
F2(std::set<int, std::less<int>, std::allocator<int> > const&):
G2(std::set<int, std::less<int>, std::allocator<int> > const&):
push rbp
push rbp
mov rbp, rdi
mov rbp, rdi
push rbx
push rbx
add rbp, 8
add rbp, 8
xor ebx, ebx
xor ebx, ebx
sub rsp, 8
sub rsp, 8
mov rdi, QWORD PTR [rdi+24]
mov rdi, QWORD PTR [rdi+24]
cmp rdi, rbp
cmp rdi, rbp
je .L7
je .L7
.L9:
.L9:
add ebx, DWORD PTR [rdi+32]
add ebx, DWORD PTR [rdi+32]
call std::_Rb_tree_increment(std::_Rb_tree_node_base const*)
call std::_Rb_tree_increment(std::_Rb_tree_node_base const*)
mov rdi, rax
mov rdi, rax
cmp rax, rbp
cmp rax, rbp
jne .L9
jne .L9
.L7:
.L7:
add rsp, 8
add rsp, 8
mov eax, ebx
mov eax, ebx
pop rbx
pop rbx
pop rbp
pop rbp
ret
ret
F3(std::__cxx11::list<int, std::allocator<int> > const&):
G3(std::__cxx11::list<int, std::allocator<int> > const&):
mov rax, QWORD PTR [rdi]
mov rax, QWORD PTR [rdi]
xor edx, edx
xor edx, edx
cmp rax, rdi
cmp rax, rdi
je .L13
je .L13
.L15:
.L15:
add edx, DWORD PTR [rax+16]
add edx, DWORD PTR [rax+16]
mov rax, QWORD PTR [rax]
mov rax, QWORD PTR [rax]
cmp rax, rdi
cmp rax, rdi
jne .L15
jne .L15
.L13:
.L13:
mov eax, edx
mov eax, edx
ret
ret
F4(std::vector<int, std::allocator<int> > const&):
G4(std::vector<int, std::allocator<int> > const&):
mov rdx, QWORD PTR [rdi]
mov rdx, QWORD PTR [rdi]
mov rdi, QWORD PTR [rdi+8]
mov rdi, QWORD PTR [rdi+8]
cmp rdx, rdi
cmp rdx, rdi
je .L24
je .L24
lea rcx, [rdi-4]
lea rcx, [rdi-4]
mov rax, rdx
mov rax, rdx
sub rcx, rdx
sub rcx, rdx
mov rsi, rcx
mov rsi, rcx
shr rsi, 2
shr rsi, 2
add rsi, 1
add rsi, 1
cmp rcx, 8
cmp rcx, 8
jbe .L25
jbe .L25
mov rcx, rsi
mov rcx, rsi
pxor xmm0, xmm0
pxor xmm0, xmm0
shr rcx, 2
shr rcx, 2
sal rcx, 4
sal rcx, 4
add rcx, rdx
add rcx, rdx
.L21:
.L21:
movdqu xmm2, XMMWORD PTR [rax]
movdqu xmm2, XMMWORD PTR [rax]
add rax, 16
add rax, 16
paddd xmm0, xmm2
paddd xmm0, xmm2
cmp rcx, rax
cmp rcx, rax
jne .L21
jne .L21
movdqa xmm1, xmm0
movdqa xmm1, xmm0
psrldq xmm1, 8
psrldq xmm1, 8
paddd xmm0, xmm1
paddd xmm0, xmm1
movdqa xmm1, xmm0
movdqa xmm1, xmm0
psrldq xmm1, 4
psrldq xmm1, 4
paddd xmm0, xmm1
paddd xmm0, xmm1
movd eax, xmm0
movd eax, xmm0
test sil, 3
test sil, 3
je .L18
je .L18
and rsi, -4
and rsi, -4
lea rdx, [rdx+rsi*4]
lea rdx, [rdx+rsi*4]
.L20:
.L20:
lea rcx, [rdx+4]
lea rcx, [rdx+4]
add eax, DWORD PTR [rdx]
add eax, DWORD PTR [rdx]
cmp rdi, rcx
cmp rdi, rcx
je .L18
je .L18
lea rcx, [rdx+8]
lea rcx, [rdx+8]
add eax, DWORD PTR [rdx+4]
add eax, DWORD PTR [rdx+4]
cmp rdi, rcx
cmp rdi, rcx
je .L18
je .L18
add eax, DWORD PTR [rdx+8]
add eax, DWORD PTR [rdx+8]
ret
ret
.L24:
.L24:
xor eax, eax
xor eax, eax
.L18:
.L18:
ret
ret
.L25:
.L25:
xor eax, eax
xor eax, eax
jmp .L20
jmp .L20